Related-art switching regulators include a pulse width limiting function, such as that shown in FIG. 1.
FIG. 1 is a schematic diagram illustrating a related-art step-down switching regulator 100 including a pulse width limiting function.
The switching regulator 100, which is a pulse modulation control type switching regulator, includes an inductor L101, a capacitor C101, a reference voltage generator 102, an error amplifying circuit 103, a triangular wave generator 104, a PWM comparator 105, a pulse width limiting circuit 106, a control logic circuit 107, a reverse flow detector 108, an input terminal IN, an output terminal OUT, switches SW1 and SW2, and resistors R101 and R102.
The switching regulator 100 adjusts pulse widths so as to balance input power and output power, and according to the function, the pulse width decreases as a load current decreases. The smaller the pulse width becomes, the greater a ratio of loss power to input power, which results in significant deterioration in operating efficiency. Therefore, in order to keep the pulse width of a pulse for turning on a switching element SW1 from falling below a given threshold, the switching regulator 100 is provided with the pulse width limiting circuit 106 of FIG. 1.
In FIG. 1, by turning on the switching element SW1 with a wide, fixed pulse width when the load is light, a ripple voltage is increased, an oscillation frequency is decreased, and a loss of power in switching is reduced, thus improving efficiency.
However, too great a pulse width may boost the ripple voltage unnecessarily. By contrast, when the pulse width becomes too small, although the ripple voltage may decrease efficiency may be degraded. Therefore, it is necessary that the pulse width be kept within a range between a value great enough to prevent a decrease in efficiency and a value small enough to suppress an unnecessary increase in output voltage ripple.
FIG. 2 illustrates an example of the pulse width limiting circuit 106 of FIG. 1.
The pulse width limiting circuit 106 of FIG. 2 includes a pulse start circuit 112, a reference current source 113, a determination circuit 114, a constant current source 121, a comparator 122, switches SWa and SWb, and a capacitor Ca.
The constant current source 121 corresponds to a current mirror circuit that generates and outputs a constant current ia in proportion to a given reference current from the reference current source 113. When a PWM pulse signal Spw from the PWM comparator 104 rises to a high level, the pulse start circuit 112 causes the switch SWa to turn on to create a conduction state and causes the switch SWb to turn off to create a shutdown state, so as to charge a capacitor Ca with a constant current ia generated by the constant current source 121.
As a voltage at a non-inversion input terminal of the comparator 122 gradually increases, and when it reaches and exceeds a given reference voltage Vref, the comparator 122 outputs a high level signal to the determination circuit 114 and to the pulse start circuit 112, resets the pulse start circuit 112, and turns off the switch Swa to the shutdown state. At the same time, the comparator 122 also turns on the switch SWb to the conduction state so as to discharge the capacitor Ca.
The determination circuit 114 generates a pulse signal Spd from a signal input from the comparator 122 and a signal output from the pulse start circuit 112, and output the pulse signal Spd to the control logic circuit 107 of FIG. 1. The pulse signal Spd is generated by limiting the pulse width of the PWM pulse signal Spw.
Thus, the pulse width of the pulse signal Spd is determined by a current value of the constant current ia, the capacity of the capacitor Ca, and the reference voltage Vref.
A reference current and the reference voltage Vref are susceptible to process variations. Therefore, the pulse width of the pulse signal Spd has varied depending on the sample, producing samples that degraded efficiency or caused large output voltage ripples. To avoid these drawbacks and increase accuracy of the pulse width of the pulse signal Spd, tests were conducted to measure the reference current and the reference voltage Vref, in which the reference current and the reference voltage Vref were adjusted according to the measurements, and as a result, a desired pulse width was obtained.
However, since the constant current source 121 includes a current mirror circuit, the constant current source 121 has random process variations in a threshold voltage Vth, size, and mobility of the transistors that constitute the current mirror circuit. Consequently, since a current ratio of the constant current source 121 to the reference current source 113 varies, even when the reference current is adjusted accurately, the variations in the pulse width of the pulse signal Spd remain large.